Belgian semiconductor research giant imec this week announced what it describes as the world’s first quantum dot qubit device fabricated using High-NA EUV lithography, marking one of the earliest demonstrations of advanced quantum hardware built using the semiconductor industry’s most cutting-edge manufacturing technology. The device, unveiled at ITF World in Leuven on May 19, uses silicon quantum dot spin qubits — nanoscale structures that trap individual electrons and exploit their quantum spin states to store information — patterned at gate gaps of barely 6 nanometers.
At first glance, the announcement may seem like another entry in the increasingly crowded quantum computing race. The actual significance, however, has less to do with raw quantum performance and more to do with manufacturing — arguably the single biggest obstacle standing between experimental quantum systems and commercially useful quantum computers.
Qubits can theoretically solve computational problems that would take classical supercomputers longer than the age of the universe, but only at a scale nobody has yet achieved. With several advancements in the physics side of quantum computing, manufacturing now represents the major limitation. Imec claims to have addressed that directly by using the semiconductor industry’s latest and most advanced lithography tool to fabricate silicon quantum dot spin qubits with tolerances compatible with industrial chip production for the first time. If that holds up, the implications for quantum scaling could be tremendous. It’s a significant step towards quantum computing, but we are still not quite there.
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Manufacturing, not physics, is now quantum computing’s major bottleneck
Quantum computing’s central problem is no longer simply whether researchers can create functioning quantum systems. Our detailed quantum computing roadmap analysis showed that companies including IBM, Google, IonQ, Quantinuum, D-Wave, PsiQuantum, and others have already demonstrated a wide range of working architectures, from superconducting qubits to trapped ions and photonic systems. The problem is scaling those systems into reliable machines containing millions of reproducible, controllable qubits. — the level widely considered necessary for commercially useful, fault-tolerant quantum computers. The most ambitious industry players’ roadmaps place that milestone around or beyond 2030, further proving that manufacturing, not physics, is the current hindrance.
Imec’s technology directly targets that problem. The company’s approach centers on silicon quantum dot spin qubits, often described as “industry qubits” because they can, in theory, leverage conventional CMOS semiconductor manufacturing infrastructure. Instead of relying on exotic standalone fabrication ecosystems, silicon quantum dots attempt to piggyback on decades of transistor scaling and wafer manufacturing expertise already developed by the semiconductor industry.
The qubits themselves work by trapping individual electrons inside nanoscale silicon structures. The electron’s quantum “spin” state stores information, while surrounding metallic control gates manipulate interactions between neighboring quantum dots. While the concept may sound deceptively straightforward, its fabrication is exponentially more complex.
Quantum dot performance depends heavily on the spacing between those control electrodes. As neighboring quantum dots move closer together, coupling strength rises exponentially, improving controllability and interaction fidelity. But achieving those gains requires reliably patterning gaps measuring only a few nanometers across an entire wafer.
Imec says it fabricated functioning qubit arrays with gaps of barely 6nm between plunger and barrier gates, using High-NA EUV (High Numerical Aperture Extreme Ultraviolet) lithography, the industry’s latest precision lithography technology.
High-NA EUV: not yet standard, already essential
High-NA EUV is the semiconductor industry’s next major lithography transition, developed primarily for future sub-2nm processors, advanced AI accelerators, and dense memory technologies. The systems, built by ASML, improve patterning precision by increasing the optical system’s numerical aperture, allowing dramatically smaller and more accurate features to be printed onto silicon wafers than current EUV systems can reliably achieve. The key difference between the new High NA EUV and conventional EUV is the increase in numerical aperture from 0.33 to 0.55
The machine weighs around 150 tons, spans the length of a double-decker bus, and requires an entirely redesigned optical system with mirrors twice as large and ten times heavier than those in standard EUV tools, polished by ZEISS to atomic precision. The technology is a ground-up engineering effort years in the making.
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Even among mainstream semiconductor manufacturers, High-NA EUV technology is only just entering commercial deployment. Intel installed the industry’s first commercial High-NA EUV lithography tool late last year, while imec received the technology in its 300mm cleanroom in March 2026 — two months ago. The machines themselves reportedly cost hundreds of millions of dollars apiece and represent one of the most complex manufacturing systems ever built.
The fact that imec has already applied High-NA EUV to quantum hardware — before most chipmakers have even integrated it into standard production flows — suggests quantum computing may be converging directly with the semiconductor industry’s existing manufacturing roadmap rather than evolving as a separate technology stack entirely. That possibility can have significant implications. Instead of waiting for quantum-specific fabrication ecosystems to mature independently, silicon quantum hardware may be able to exploit the extremely advanced infrastructure of a multibillion-dollar industry, potentially significantly compressing quantum computing timelines. Although this does not mean manufacturable quantum computers are suddenly close.
The implications of imec’s achievement for quantum computing and the semiconductor industry
While imec’s prototype remains far from a large-scale fault-tolerant quantum computer, it still represents a functioning silicon quantum dot spin qubit device — a type of quantum hardware designed to store and manipulate information using the quantum spin states of trapped electrons. These qubits belong to a class of quantum architectures viewed as promising candidates for tackling computational problems that quickly overwhelm even the world’s most powerful supercomputers due to their enormous combinatorial and quantum-mechanical complexity.
Silicon quantum dot spin qubits are particularly notable among those candidates because their production process is compatible with standard CMOS semiconductor manufacturing — the same ecosystem that produces CPUs, GPUs, and AI accelerators. It is worth clarifying that imec’s breakthrough lies in the manufacturing process, not in the qubit architecture itself. Silicon quantum dot spin qubits already exist and have been an active area of semiconductor and quantum research for over a decade. Previous devices have been demonstrated using conventional lithography at the laboratory scale. While that proved the architecture works, it stopped well short of what industrial scaling demands: consistent, reproducible fabrication at nanoscale tolerances across an entire wafer.
That is the gap imec is now targeting. By demonstrating that High-NA EUV lithography can pattern silicon quantum dot spin qubits at gate gaps of just 6 nanometers on a 300mm fab-compatible process, imec has shown for the first time that the semiconductor industry’s most advanced manufacturing tool can be brought to bear on this class of quantum hardware — moving the architecture from lab-scale demonstration toward something that could eventually be manufactured like a chip.
If sufficiently scaled and stabilized, silicon quantum dot spin qubit systems could accelerate progress in molecular simulation, advanced materials discovery, pharmaceutical research, cryptography, logistics optimization, and complex physical-system modeling — fields whose computational demands can be prohibitively difficult for classical supercomputers, regardless of how powerful those machines become.
Rather than serving consumers directly, these systems would likely be deployed by hyperscalers, governments, national laboratories, pharmaceutical firms, and defense organizations tackling computational problems where even incremental breakthroughs could have massive scientific or strategic consequences. The technology would most probably be accessed through cloud-based quantum infrastructure rather than on-premises hardware.
