AMD has submitted Linux kernel patches including support for its new low-power CPU cores that will likely emerge in its future heterogeneous processors. The new patch clearly distinguishes between high-performance cores, efficiency cores, and low-power cores, so it is safe to say that AMD’s upcoming CPU platforms will use three types of cores, with the low-power one serving light workloads, reports Phoronix.
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AMD’s heterogeneous processors identify CPU types using CPUID Function 0x80000026 (Extended CPU Topology), as EBX bits [31:28] carry the core classification. Up until recently, AMD only classified its cores as Performance and Efficiency, while the latest patch adds Low-Power cores. The patch enables Linux to distinguish between Performance, Efficiency, and Low-Power cores efficiently, and the latter are also correctly supported by AMD’s performance management.
According to AMD engineer Vishal Badole, these cores are designed specifically for background and idle tasks where reducing energy consumption is more important than offering high performance.
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In recent years, both AMD and Intel released heterogeneous processors featuring both high-performance and energy-efficient types of cores in a bid to wed performance and low power consumption. With its latest CPU platforms, Intel introduced its low-power cores located in the SoC tile to offload light tasks and prolong the battery life of laptops. As it turns out, AMD is going the same route. Although AMD uses two different core types, the underlying architecture is the same. It offers a “dense” core offering that’s optimized for space, while Intel uses entirely different microarchitectures.
Beyond the description of the Linux patch, AMD disclosed little about the low-power cores. The company only described them as being optimized for the lowest possible power consumption during background processing and idle operation, but did not reveal how they differ architecturally from today’s dense Zen 5c cores. In addition, the kernel patches introduce no new scheduling policies or optimization logic beyond identifying the additional CPU category.
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AMD also did not reveal whether these cores are based on the Zen 5, Zen 6, or other future microarchitecture. It should indeed be noted that AMD has traditionally preferred to use the same microarchitecture within one CPU, albeit with different optimizations when it comes to die size (or rather floorplan) and clocks. Such an approach greatly simplifies software development and performance management, but at the cost of higher power consumption compared to what a simplified microarchitecture would have offered.
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